Field of the Invention
The present invention relates to the field of display technology, and particularly to an array substrate assembly and a display device.
Description of the Related Art
With the development of liquid crystal technique, image quality requirements for a display device become higher. In existing array substrate assemblies, small terminals are provided at terminal regions. FIG. 1a schematically shows a terminal region of an existing array substrate assembly, FIG. 1b is a sectional view in A-A′ direction in FIG. 1a, and FIG. 1c is a section view in B-B′ direction in FIG. 1a, wherein reference numerals 100, 101, 102, 103, 104 and 105 indicate a substrate, an insulating layer, a gate line, a date line, a passivation layer and an ITO (indium tin oxide) layer respectively.
In the prior art, as shown in FIGS. 1a, 1b and 1c, the terminal region is usually designed to have a two-layer-metal structure comprising a gate line metal and a date line metal. However, since there is a height difference between a gate line terminal 102a and a date line terminal 103a, deformation difference between a first conducting gold ball 106 at the gate line terminal 102a and a second conducting gold ball 107 at the data line terminal 103a is large when the array substrate assembly is bonded to an IC (integrated circuit) or a COF (chip on film), as shown in FIG. 1d. The large deformation difference introduces impedance difference and causes signal-attenuation inconsistence, and thus adversely affects image quality.